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Extended model checking hardware verification
Extended model checking hardware verification
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机译:扩展模型检查硬件验证
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摘要
A method and computer program for verifying a design of a circuit comprises providing a model of the design; providing a first property for the design, wherein the first property describes a first behavior; checking the model using the first property and an environment of the design starting at a reset state until an example of the first behavior occurs; providing a second property for the design, wherein the second property describes a second behavior; and checking the model using the second property and an environment of the design starting at a state when the example of the first behavior occurs.
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