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Semiconductor device having enhanced di/dt tolerance and dV/dt tolerance

机译:具有增强的di / dt公差和dV / dt公差的半导体器件

摘要

A semiconductor device has an enhanced di/dt tolerance and a dv/dt tolerance without increasing an ON resistance. An underpad base region is provided on a region in an upper main surface of a semiconductor substrate which is provided under a gate pad, and the underpad base region is not connected to a source electrode and is not coupled to a main base region connected to the source electrode. The underpad base region is brought into a floating state.
机译:半导体器件在不增加导通电阻的情况下具有增强的di / dt容限和dv / dt容限。底垫基极区设置在设置在栅极焊盘下方的半导体衬底的上主表面中的区域上,并且底垫基极区不连接至源电极并且不耦合至连接至源极的主基极区。源电极。底垫基部区域进入浮动状态。

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