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Triple inverter pierce oscillator circuit suitable for CMOS
Triple inverter pierce oscillator circuit suitable for CMOS
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机译:适用于CMOS的三反相器刺穿振荡器电路
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摘要
An oscillator circuit is disclosed which can be formed using discrete field-effect transistors (FETs), or as a complementary metal-oxide-semiconductor (CMOS) integrated circuit. The oscillator circuit utilizes a Pierce oscillator design with three inverter stages connected in series. A feedback resistor provided in a feedback loop about a second inverter stage provides an almost ideal inverting transconductance thereby allowing high-Q operation at the resonator-controlled frequency while suppressing a parasitic oscillation frequency that is inherent in a Pierce configuration using a “standard” triple inverter for the sustaining amplifier. The oscillator circuit, which operates in a range of 10–50 MHz, has applications for use as a clock in a microprocessor and can also be used for sensor applications.
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