首页> 外国专利> Apparatus for selecting test patterns for logic circuit, computer implemented method for selecting test patterns, and computer program product for controlling a computer system so as to select test patterns

Apparatus for selecting test patterns for logic circuit, computer implemented method for selecting test patterns, and computer program product for controlling a computer system so as to select test patterns

机译:用于选择逻辑电路的测试图案的设备,用于选择测试图案的计算机实现的方法以及用于控制计算机系统以选择测试图案的计算机程序产品

摘要

An apparatus for selecting test patterns in accordance with an embodiment of the present invention has a first test pattern selecting module configured to define selected test patterns and unselected test patterns, a fault simulation module configured to simulate whether test patterns detect faults, a weighting module configured to add a weight to each of the first undetected faults, a fault sampling module configured to extract second undetected faults from the first undetected faults to which the added weights are given, and a second test pattern selecting module configured to extract additionally selected test patterns based on the added weight.
机译:根据本发明实施例的用于选择测试模式的设备具有:第一测试模式选择模块,被配置为定义选择的测试模式和未选择的测试模式;故障模拟模块,被配置为模拟测试模式是否检测到故障;加权模块,被配置为为了向第一未检测到的故障中的每一个增加权重,故障采样模块被配置为从被赋予了权重的第一未检测到的故障中提取第二未检测到的故障,第二测试模式选择模块被配置为基于在增加的重量上。

著录项

  • 公开/公告号US7162674B2

    专利类型

  • 公开/公告日2007-01-09

    原文格式PDF

  • 申请/专利权人 YASUYUKI NOZUYAMA;

    申请/专利号US20030678975

  • 发明设计人 YASUYUKI NOZUYAMA;

    申请日2003-10-02

  • 分类号G01R31/28;

  • 国家 US

  • 入库时间 2022-08-21 20:59:46

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