A SYSTEM FOR AUTOMATIC VERIFICATION OF USAGE WORTHINESS OF FLASH MEMORY HARDWARES USED IN COMPUTERS

摘要

The invention provides an automatic and comprehensive hardware verification system for Flash memory hardwares. The general procedure followed is to generate address and data by using a pattern generator, access the memory under test using the generated address, and write in said data, access and read out the memory under test using said address with appropriate output enable signal and compare the read-out data with the expected data or with a correct data for inspecting of the memory device carries out the correct read/write operation. A number of test patterns have been provided to aid evaluation of the memory device. A program operation is performed to write a "0" in a cell of the flash memory, and to write a "1" in that cell, the location of the cell is erased, one block at a time, by formulating a FMAT algorithm which is implemented for verification of usage worthiness of the flash memory hardwares in computers.