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Retimimg circuits using a cut-based approach

机译:使用基于切割的方法进行Retimimg电路

摘要

Methods and apparatus for retiming an integrated circuit are described. According to certain embodiments, the retiming comprises performing a timing analysis for one or more paths in the integrated circuit to obtain slack values, selecting one of the paths based on the slack values obtained, and determining a retimeable cut along the path selected. The retimeable cut in these exemplary embodiments comprises a set of input pins for one or more logic instances in the integrated circuit to which one or more retimed sequential elements can be coupled in order to improve the slack value of the path selected. In particular embodiments, the retimeable cut is automatically selected from multiple possible cuts along the path selected. Other embodiments for retiming integrated circuits are disclosed, as well as integrated circuits and circuit design databases retimed by the disclosed methods. Computer-executable media storing instructions for performing the disclosed methods are also disclosed.
机译:描述了用于重新定时集成电路的方法和设备。根据某些实施例,重定时包括对集成电路中的一条或多条路径执行时序分析以获得松弛值,基于所获得的松弛值选择路径之一,以及确定沿所选择的路径的可重新定时切割。在这些示例性实施例中,可重定时的切口包括用于集成电路中的一个或多个逻辑实例的一组输入引脚,一个或多个重定时的顺序元件可以耦合至该输入引脚,以便改善所选路径的松弛值。在特定实施例中,可重定时剪辑是沿着所选路径从多个可能的剪辑中自动选择的。公开了用于重定时集成电路的其他实施例,以及通过所公开的方法重新定时的集成电路和电路设计数据库。还公开了存储用于执行所公开的方法的指令的计算机可执行介质。

著录项

  • 公开/公告号EP1623448A4

    专利类型

  • 公开/公告日2007-04-18

    原文格式PDF

  • 申请/专利权人 MENTOR GRAPHICS CORPORATION;

    申请/专利号EP20040700017

  • 发明设计人 SUARIS PETER;WANG DONGSHENG;

    申请日2004-03-18

  • 分类号G06F17/50;G06F9/45;G06F9/455;H01L;

  • 国家 EP

  • 入库时间 2022-08-21 20:48:30

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