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MEMORY CONTROLLER FOR TRANSMITTING DECREMENT AND INCREMENT BURST AND THE DECREMENT AND INCREMENT BURST TRANSMITTING METHOD THEREOF
MEMORY CONTROLLER FOR TRANSMITTING DECREMENT AND INCREMENT BURST AND THE DECREMENT AND INCREMENT BURST TRANSMITTING METHOD THEREOF
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机译:用于发送减量和增量爆发的存储器控制器及其减量和增量爆发发送方法
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摘要
Can reduce/storage control of increment burst transfer and a kind of its reduction/increment burst transmission methods by supporting increment is arranged to carry out reduction/increment burst transfer to burst to the data access manufactured in order, sequentially reduced from top address. One address decoder (421) reads a data access command and a system address, receives and passes through a system bus (415). One data buffer (423) temporary storing data. If the data access command read in address decoder is a decrement process, one address refresh controller (422) stores the data to data buffer to make a decrement memory address matching, it is with the system address rearranged in reverse order, by rearranging system address in reverse order and generating storage address with reducing from an initial address. If data access command is a decrement process, with increment, address refresh controller stores the data to data buffer and is addressed by generating the increment memory address matching of storage address action system address from the beginning.
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