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ARRANGEMENT WITH A PLURALITY OF PROCESSORS SHARING A COLLECTIVE MEMORY
ARRANGEMENT WITH A PLURALITY OF PROCESSORS SHARING A COLLECTIVE MEMORY
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机译:与多个处理器共享集体内存的安排
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摘要
The data processing apparatus has a plurality of processors. These processors share a set of memory. The device is provided with a dedicated bus. Private bus enables data communication exclusively between a processor and a set of memory. The memory interface provides access to the set of memory in data bursts while generating a substantially constant data stream on a dedicated bus.
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