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MULTIPLE-WORD MULTIPLICATION-ACCUMULATION CIRCUIT AND MONTGOMERY MODULAR MULTIPLICATION-ACCUMULATION CIRCUIT
MULTIPLE-WORD MULTIPLICATION-ACCUMULATION CIRCUIT AND MONTGOMERY MODULAR MULTIPLICATION-ACCUMULATION CIRCUIT
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机译:多字乘法累加电路和蒙哥马利模数乘法累加电路
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摘要
The invention also uses a single-port memory is effectively multiplying operation is possible deflection data (多倍 長: multiple-word) for its object to provide a multiplying operation processing circuit. ; MAC (12) is a bit width of multiplying calculation process, and register with different multiplier and the multiplicand (13, 14, 15, 16, 17) is consumed in one clock time in the MAC (12) according to the bit width since the amount of data and generating the sum of the amount of data to adjust the data amount to be supplied to the MAC (12) in one clock time of the deflection data so that the amount of transferable data in one clock time in the memory 11 of the single-port even if the data transfer capability of the memory 11 do not make efficient use of the MAC circuit (12).
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