APPARATUS FOR OPTIMIZATION OF STATISTICAL DELAY MODEL AND METHOD FOR SIZING GATE

摘要

An apparatus for optimizing a delay time and a gate sizing method using the same are provided to optimize a performance of a circuit by performing a gate sizing applying a probable delay time model. A gate sizing method using a delay time optimizing apparatus includes the steps of: calculating an average, and a standard deviation of a signal delay time inputted to a gate, and a correlation between delay time random variables(S701); outputting a delay time transfer value of the gate through an adding operation and a maximum value operation of the calculated delay time(S702); and calculating a gate sizing factor based on the average, standard deviation, and the gate delay time transfer value(S704). The correlation between the delay time random variables uses a covariance.