APPARATUS AND METHOD FOR COMPENSATE OF TIMING MARGIN LOSS AS CAPACITANCE LOAD BETWEEN MICROPROCESSOR AND INPUT/OUTPUT UNIT

摘要

The present invention is a fan-out (Fan Out) increase in the load capacitance (capacitance load) due to the overlap timing margins relates to a device and a method for improving the reduction, in the present invention is a system for performing parallel communication between the microprocessor (Microprocessor), and a plurality of input and output chip (I / O Chip), and the microprocessor, the comprising at least one or more groups which each serial connection timing delay between the microprocessor and the plurality of input and output chips are connected in parallel, in correspondence to the micro-delay caused by the time delay the timing of the plurality of groups of output chips inherent capacitance load By delaying each time the output signal of the processor, characterized in that to prevent malfunctioning of the microprocessor parallel bus.