CLOCK GENERATING APPARATUS AND CLOCK RECEIVING APPARATUS FOR ELIMINATING THE DIFFERENCE OF GENERATED CLOCKS

摘要

A clock signal generating apparatus including a clock generator, a distributor, a plurality of delay units, and generates a clock signal for synchronized driving of a system having a plurality of clock receiving apparatuses. The clock signal generator generates a clock signal for driving the system by using an external clock signal and a feedback clock signal. The distributor distributes the clock signal output to generate a plurality of distributed clock signals and outputs the plurality of distributed clock signals to the plurality of clock receiving apparatuses through a plurality of signal transmission paths. The plurality of delay units are respectively located on the plurality of signal transmission paths, control phases of the plurality of distributed clock signals to generate a plurality of phase-controlled clock signals, and transmit the plurality of phase-controlled clock signals to the plurality of clock receiving apparatuses.