首页> 外国专利> Semiconductor memory device including circuit for blocking operation of bias circuit and bias voltage generating method thereof

Semiconductor memory device including circuit for blocking operation of bias circuit and bias voltage generating method thereof

机译:包括用于阻止偏置电路的操作的电路的半导体存储器件及其偏置电压产生方法

摘要

The semiconductor memory device and its bias voltage generation method is disclosed which includes a bias circuit operation blocking circuit. In the semiconductor memory device in self-refresh mode, the bias circuit operates blocking circuit is disabled by the bias circuit , and also a predetermined voltage level bias circuit is not putting the output terminal of the bias circuit by the target current supply circuit is disabled during flow precharged . Therefore, the characteristics of analog circuitry connected to the output terminal of the bias circuit without being affected the power consumption in the self refresh mode is greatly reduced .
机译:公开了一种半导体存储器件及其偏置电压产生方法,其包括偏置电路操作阻止电路。在处于自刷新模式的半导体存储器件中,偏置电路操作阻塞电路被偏置电路禁用,并且预定电压电平偏置电路不使目标电流源电路的偏置电路的输出端子无效。在预充流量中。因此,在不影响自刷新模式下的功耗的情况下,大大减小了连接至偏置电路的输出端子的模拟电路的特性。

著录项

  • 公开/公告号KR100761837B1

    专利类型

  • 公开/公告日2007-09-28

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20060012581

  • 发明设计人 김준배;

    申请日2006-02-09

  • 分类号G11C5/14;G11C11/4074;

  • 国家 KR

  • 入库时间 2022-08-21 20:31:17

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