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Data processing method for use in e.g. digital computer, involves providing four different potential levels that comprise logic numbers, where binary logic gates and different trinary and quaternary logics are provided
Data processing method for use in e.g. digital computer, involves providing four different potential levels that comprise logic numbers, where binary logic gates and different trinary and quaternary logics are provided
The method involves providing four different potential levels, where binary logic gates and different trinary and quaternary logics are provided. A set of NPN amplifiers is arranged, where a voltage divider is provided between an output and an input of the amplifiers. A trinary output stage is arranged in which PNP amplifiers are arranged for two signals, where the four potential levels comprise a logic number 0, 1, 2, and 3. An independent claim is also included for a circuit provided for data processing.
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