首页> 外国专利> Dynamic random access memory-semiconductor memory device, has two memory cells with gates, where gates are switchable by control switching device at beginning of preloading process for loading bit lines to compensation voltage

Dynamic random access memory-semiconductor memory device, has two memory cells with gates, where gates are switchable by control switching device at beginning of preloading process for loading bit lines to compensation voltage

机译:动态随机存取存储器-半导体存储设备,具有两个带有门的存储单元,其中,在预加载过程开始时,控制开关设备可将门切换,以将位线加载到补偿电压

摘要

The device has memory cells (2) with a selection transistor, where gates of the transistor are connected to word lines. A pair of bit lines is connected to a sense amplifier, and two memory cells (6) are connected to the bit lines. A control switching device (7`) is provided, where gates of the memory cells (6) are switchable by the device (7`) at the beginning of a preloading process for loading the bit lines to a compensation voltage. An independent claim is also included for a method for increasing readability of a dynamic random access memory-memory cell in a memory cell field.
机译:该装置具有带有选择晶体管的存储单元(2),其中该晶体管的栅极连接到字线。一对位线连接到读出放大器,并且两个存储单元(6)连接到位线。提供了一种控制切换装置(7`),其中在预加载过程开始时,存储装置(6`)的栅极可通过装置(7`)进行切换,以将位线加载至补偿电压。还包括一种用于增加存储单元字段中的动态随机存取存储存储器单元的可读性的方法的独立权利要求。

著录项

  • 公开/公告号DE102005050811B3

    专利类型

  • 公开/公告日2007-02-15

    原文格式PDF

  • 申请/专利权人 INFINEON TECHNOLOGIES AG;

    申请/专利号DE20051050811

  • 发明设计人 ZIMMERMANN ULRICH;GERBER RALF;

    申请日2005-10-24

  • 分类号G11C7/12;

  • 国家 DE

  • 入库时间 2022-08-21 20:29:43

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