Processor system e.g. control device, for controlling motor vehicle, has parity generator starting error handling routines in case of detection of bit errors, where routines are released to change different subsets of sets of variables

摘要

The system has a processor (1) for execution of program commands of an application, and a program memory for storage of the commands and error handling routines. A random access memory (RAM) (2) is provided for storage of sets of variables of the application. A parity generator (10) is provided for detection of bit errors of registers (6) of the processor and/or the main memory and for starting the error handling routines in case of detection of the error, where the routines are released to change different subsets of the sets of variables.