Reverse polish notation processing device for e.g. microprocessor, has stack manager and multiplexers managing content of stack such that content of stage of stack is stored in cache memory and content of other stages is stored in RAM

摘要

The device has a memory unit comprising a RAM and cache memory to form a LIFO stack A management unit comprises an instruction decoder (M0) e.g. programmable logic array, multiplexer (M1), register (M2) for managing a stack pointer, where the stack pointer is a physical address associated to a reference stage of the stack. A stack manager and multiplexers (M5-M9) manage content e.g. octet, of the stack based on the stack pointer such that the content of a stage of the stack is stored in the cache memory and the content of other stages is stored in RAM.