Method and apparatus for the simultaneous multi-level and/or multi-simulator design optimization of electronic circuits

摘要

The present invention relates to a system for synthesizing an electronic circuit at plural abstraction levels. The system includes one or more evaluation tools for evaluating the performance and/or behavior of the circuit at the abstraction levels. The system further includes means for passing parameters and/or performances between abstraction levels and/or evaluation tools. The system is adapted for evaluating the performance and/or behavior of the circuit using at least part of the passed parameters and/or performances at a plurality of the abstraction levels within one synthesis iteration.