首页> 外国专利> CONTROL CIRCUIT OF DC-DC CONVERTER, DC-DC CONVERTER, POWER SUPPLY VOLTAGE SUPPLYING SYSTEM AND POWER SUPPLY VOLTAGE SUPPLYING METHOD

CONTROL CIRCUIT OF DC-DC CONVERTER, DC-DC CONVERTER, POWER SUPPLY VOLTAGE SUPPLYING SYSTEM AND POWER SUPPLY VOLTAGE SUPPLYING METHOD

机译:DC-DC转换器,DC-DC转换器,电源电压供应系统的控制电路以及电源电压供应方法

摘要

PPROBLEM TO BE SOLVED: To provide a control circuit of a DC-DC converter, or the like, which prevents localization of switching operations when a light load is connected, and improves power conversion efficiency. PSOLUTION: An oscillator OSC outputs a reference clock signal RCK. A switching duty control circuit 14G controls an on-duty of a transistor FET1 in accordance with an output voltage. An operation frequency control circuit 12G divides the frequency of a reference clock signal having negative correlation with the output voltage and to be inputted, to generate a control clock signal. When it is determined that the load is in a high load state, the reference clock signal RCK is outputted from a switching control circuit 16G, and when it is determined the load is in a low load state, a control clock signal PCK is outputted. A conduction control circuit 17G controls transistors FET1 and FET2 depending on the reference clock signal RCK or the control clock signal PCK. PCOPYRIGHT: (C)2009,JPO&INPIT
机译:

要解决的问题:提供DC-DC转换器等的控制电路,该DC-DC转换器等的控制电路防止在连接轻负载时开关操作的局部化,并提高了功率转换效率。

解决方案:振荡器OSC输出参考时钟信号RCK。开关占空比控制电路14G根据输出电压来控制晶体管FET1的占空比。工作频率控制电路12G将与输出电压具有负相关的基准时钟信号的频率分频并输入,以生成控制时钟信号。当确定负载处于高负载状态时,从切换控制电路16G输出参考时钟信号RCK,并且当确定负载处于低负载状态时,输出控制时钟信号PCK。导通控制电路17G根据参考时钟信号RCK或控制时钟信号PCK来控制晶体管FET1和FET2。

版权:(C)2009,日本特许厅&INPIT

著录项

  • 公开/公告号JP2008236822A

    专利类型

  • 公开/公告日2008-10-02

    原文格式PDF

  • 申请/专利权人 FUJITSU LTD;

    申请/专利号JP20070068568

  • 发明设计人 HASEGAWA MORIHITO;

    申请日2007-03-16

  • 分类号H02M3/155;

  • 国家 JP

  • 入库时间 2022-08-21 20:23:51

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