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Circuit parameter extraction method, the design method and apparatus for a semiconductor integrated circuit
Circuit parameter extraction method, the design method and apparatus for a semiconductor integrated circuit
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机译:半导体集成电路的电路参数提取方法,设计方法和装置
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摘要
PROBLEM TO BE SOLVED: To enable highly precise calculation of finished wiring width and highly precise circuit simulation. SOLUTION: Correlation data 101 between the distance between model wiring and wiring existing around the model wiring in the same layer and the difference between the mask-layout width and the finished width of the model wiring are prepared, the wiring length and wiring width of analyzing wiring and the distance between the analyzing wiring and the wiring existing around the analyzing wiring in the same layer are extracted from the actual layout 100 (102), and wiring resistance value and wiring capacitance value with respect to the extracted layout-wiring width of the analyzing wiring and the extracted distance between the analyzing wiring and the wiring existing around the analyzing wiring are calculated by using finished wiring width obtained by referring to the correlation data (105).
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