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Method in a Computer-aided Design System for Generating a Functional Design Model of a Test Structure
Method in a Computer-aided Design System for Generating a Functional Design Model of a Test Structure
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机译:计算机辅助设计系统中用于生成测试结构功能设计模型的方法
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摘要
A method in a computer-aided design system for generating a functional design model of a test structure. The test structure is used for performing device-specific testing and acquiring parametric data on integrated circuits, such that each chip generated from the functional design model is tested individually without excessive test time requirements, additional silicon, or special test equipment. The method includes a functional representation of a device test structure integrated into an IC design which tests a set of dummy devices that are identical or nearly identical to a selected set of functional representations of devices contained in the IC. The test structures are integrated from a device under test (DUT) library according to customer requirements and design requirements. The selected test structures are further prioritized and assigned to design elements within the design in order of priority. Placement algorithms use design, layout, and manufacturing requirements to place the selected test structures into the final layout of the design.
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