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Method and apparatus for queuing memory access commands in a memory queue of an information handling system
Method and apparatus for queuing memory access commands in a memory queue of an information handling system
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机译:在信息处理系统的存储器队列中排队存储器访问命令的方法和装置
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摘要
A memory controller includes an address queue with address queue locations that may expand to store address commands that point to consecutive locations in memory. In this manner, multiple address commands may combine together in a common expanded address queue location. In one embodiment, each address queue location includes a main information portion and a supplemental information portion. The supplemental information portion is smaller than the main information portion. The main information portion stores the target address information of a first address command. When the address queue receives an address command with a target address that is consecutive to the target address of the first command, then the supplemental address portion stores a subset of the target address of the second command.
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