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MASTER BIAS CURRENT GENERATING CIRCUIT WITH DECREASED SENSITIVITY TO SILICON PROCESS VARIATION
MASTER BIAS CURRENT GENERATING CIRCUIT WITH DECREASED SENSITIVITY TO SILICON PROCESS VARIATION
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机译:主偏置电流生成电路,对硅工艺变化的敏感性降低
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摘要
A master bias current generating circuit includes a current source, a first reference leg, and a second reference leg. The first reference leg includes a first transistor having a first size parameter coupled to the current source and a first diode having a second size parameter coupled to the first transistor. The second reference leg includes a second transistor having a third size parameter less than the first size parameter coupled to the current source and a second diode having a fourth size parameter greater than the second size parameter coupled to the second transistor.
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