METHOD FOR SPEEDY DELIVERY OF DATA BETWEEN PROCESSORS AND DIGITAL PROCESSING APPARATUS HAVING SHARED MEMORY

摘要

The present invention is directed to a method for speedy delivery of data between a plurality of processors and a digital processing apparatus having a shared memory. According to a preferred embodiment of the present invention, a memory unit having a plurality of partitioned areas can send access status information of a particular control unit for a partitioned storage area to each control unit to prevent overlapped access. When a first control unit writes data in a first partitioned storage area and then changes its access to a second partitioned area, a second control unit accesses the first partitioned storage area to read the data. According to the present invention, the process of communicating data through a BUS when delivering data between a plurality of processors is not needed, thereby enabling speedy delivery of data.