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Data Processing System and Computer Program Product to Allow PCI Host Bridge (PHB) to Handle Pre-Fetch Read Transactions on the PCI Bus Which Access System Memory Through Translation Control Entry (TCE) Table
Data Processing System and Computer Program Product to Allow PCI Host Bridge (PHB) to Handle Pre-Fetch Read Transactions on the PCI Bus Which Access System Memory Through Translation Control Entry (TCE) Table
A method, system, and computer instructions for providing valid translation entries in the TCE table for all supported DMA addresses to prevent the occurrence of system errors due to prefetching. The mechanism of the present invention reserves a page in system memory. This reserved page is made unavailable to the operating system and may not be utilized by any software in the system. The reserved page is also written with all bytes set to 0xFF. The system firmware then selects a region in system memory for the TCE table. The TCE table is initialized, with all entries within the TCE table initialized to be valid as well as contain the corresponding address of the reserved page. In this manner, all supported DMA page addresses will have valid TCE entries which translate the DMA addresses into the reserved page memory. Thus, prefetched DMA addresses will not encounter invalid DMA address translation, and crash the system.
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