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Extension of accuracy of a flash ADC by 1-bit through interpolation of comparator outputs
Extension of accuracy of a flash ADC by 1-bit through interpolation of comparator outputs
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机译:通过比较器输出的插值将闪存ADC的精度扩展1位
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摘要
ADC accuracy is increased by 1 bit by interpolation of comparator outputs in a comparator array, thereby increasing accuracy without significantly increasing power consumption and size. Specifically, an analog-to-digital converter includes a binary converter and a comparator array, which comprises a plurality of comparator blocks, each block having a primary comparator and an intepolating comparator. The intepolating comparator compares an output signal from the primary comparator with a negative output signal from a primary comparator of another block of the plurality of blocks to generate a least significant bit. The binary converter, which is coupled to the array, converts array output to binary code.
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