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Method and apparatus for directory-based coherence with distributed directory management

机译:基于目录的一致性与分布式目录管理的方法和装置

摘要

A system for cache coherency comprises a memory. The memory comprises a plurality of data items and a plurality of directory information items, each data item uniquely associated with one of the plurality of directory information items. Each of the plurality of data items is configured in accordance with one of a plurality of access modes. Each of the plurality of directory information items comprises indicia of the access mode of its associated data item. A multiplexer couples to the memory and comprises a multiplex ratio. A plurality of buffers couple to the multiplexer and to the memory. The multiplex ratio is a function of the number of buffers in the plurality of buffers. A plurality of multiplexer/demultiplexers (MDMs) each uniquely couple to a different one of the plurality of buffers. A plurality of processing elements couple to the memory; each of the processing elements uniquely couples in a point-to-point connection to a different one of the plurality of MDMs. Each of the processing elements is configured to transmit a data request to its associated MDM, the data request identifying one of the plurality of data items and an access mode. The memory is configured to transmit a data response to each of the processing elements in response to a data request, the data response comprising the identified data item and its associated directory information. Each of the processing elements is further configured to receive the data response and to compare the associated directory information with the access mode of the data request and in the event that the associated directory information and the access mode of the data request are not compatible, to initiate coherence actions for the requested data item. A method for cache coherency is also provided.
机译:用于高速缓存一致性的系统包括存储器。该存储器包括多个数据项和多个目录信息项,每个数据项唯一地与多个目录信息项之一相关联。多个数据项中的每一个根据多个访问模式之一来配置。多个目录信息项中的每一个都包括其关联数据项的访问模式的标记。多路复用器耦合到存储器并包括多路复用比。多个缓冲器耦合到多路复用器和存储器。复用比是多个缓冲器中的缓冲器数量的函数。多个复用器/解复用器(MDM)每个都唯一地耦合到多个缓冲器中的不同缓冲器。多个处理元件耦合到存储器;每个处理元件以点对点连接方式唯一地耦合到多个MDM中的另一个。每个处理元件被配置为向其相关联的MDM发送数据请求,该数据请求标识多个数据项之一和访问模式。存储器被配置为响应于数据请求而将数据响应发送到每个处理元件,该数据响应包括所识别的数据项及其相关联的目录信息。每个处理元件还被配置为接收数据响应并且将相关联的目录信息与数据请求的访问模式进行比较,并且在相关联的目录信息与数据请求的访问模式不兼容的情况下,对所请求的数据项启动一致性操作。还提供了一种用于高速缓存一致性的方法。

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