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Method and apparatus for engineering a testability interposer for testing sockets and connectors on printed circuit boards

机译:用于设计用于测试印刷电路板上的插座和连接器的可测试插入器的方法和设备

摘要

A method and apparatus is presented for gaining socket testability through the use of a capacitive interposer engineered to create capacitive coupling between signal nodes of a circuit assembly that the tester has access to and nodes of the socket that would not otherwise have any coupling to a testable signal node of the socket. Generally, coupling capacitance is engineered into the interposer by trace and via routing between the signal node of the socket and a location in close proximity to the inaccessible socket node such that their proximity to each other couples them together.
机译:提出了一种方法和装置,该方法和装置用于通过使用电容性内插器来获得插座可测试性,该电容性内插器被设计为在测试仪可以访问的电路组件的信号节点与插座的节点之间建立电容性耦合,否则该插座的节点将不会与可测试器件产生任何耦合。套接字的信号节点。通常,耦合电容通过走线和经由插座的信号节点与紧邻不可访问的插座节点的位置之间的布线而设计到中介层中,从而使得它们彼此之间的接近将它们耦合在一起。

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