Memory of and circuit for rearranging the order of data in a memory having asymmetric input and output ports

摘要

Circuits and methods of rearranging the order of data in a memory having asymmetric input and output ports are disclosed. According to one embodiment, a method comprises steps of providing an input port of a memory having an input width and output port having an output width which is different than the input width. A plurality of data words are received at the input of the memory, wherein each data word has a width corresponding to the input width. The order of the plurality of input data words is rearranged; and an output word based upon the rearranged data words and having a width corresponding to the output width is generated. Various circuits and algorithms for implementing the methods are also disclosed.