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Method of automating place and route corrections for an integrated circuit design from physical design validation

机译:从物理设计验证中自动进行集成电路设计的布局和路线校正的方法

摘要

A method and computer program product for automatically correcting errors in an integrated circuit design includes steps of: (a) performing a physical design validation of an integrated circuit design to verify compliance with a set of design rules; (b) generating a results database of design rule violations detected by the physical design validation; (c) identifying locations in the integrated circuit design from the results database for making design corrections according to a post-processing rule deck so that the locations of the design corrections comply with the set of design rules; and (d) implementing the design corrections in the integrated circuit design.
机译:一种用于自动校正集成电路设计中的错误的方法和计算机程序产品,包括以下步骤:(a)对集成电路设计进行物理设计验证,以验证是否符合一组设计规则; (b)生成由物理设计验证发现的违反设计规则的结果数据库; (c)从结果数据库中识别集成电路设计中的位置,以便根据后处理规则平台进行设计校正,以使设计校正的位置符合设计规则集; (d)在集成电路设计中实施设计校正。

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