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THREE DIMENSIONAL SIX SURFACE CONFORMAL DIE COATING

机译:三维六面保形模具涂层

摘要

Semiconductor die are typically manufactured as a large group of integrated circuit die imaged through photolithographic means on a semiconductor wafer or slice made of silicon. After manufacture, the silicon wafer is thinned, usually by mechanical means, and the wafer is cut, usually with a diamond saw, to singulate the individual die (10). The resulting individual integrated circuit has six exposed surfaces. The top surface of the die includes the circuitry images and any passivation layers that have been added to the to layer during wafer fabrication. The present invention describes a method for protecting and insulating (20) all six surfaces of the die (10) to reduce breakage, provide electrical insulation for these layers, and to provide physical surfaces that can be used for bonding one semiconductor die to another for the purpose of stacking die (10) in an interconnected module or component.
机译:半导体管芯通常被制造为通过光刻方法在由硅制成的半导体晶片或切片上成像的大量集成电路管芯。在制造之后,通常通过机械手段使硅晶片变薄,并且通常利用金刚石锯将硅晶片切割以分离单个管芯(10)。所得的单个集成电路具有六个暴露的表面。管芯的顶表面包括电路图像和在晶片制造过程中已添加到该层的任何钝化层。本发明描述了一种用于保护和绝缘(20)管芯(10)的所有六个表面以减少破损,为这些层提供电绝缘并提供可用于将一个半导体管芯粘结到另一半导体管芯的物理表面的方法。目的是将管芯(10)堆叠在互连的模块或组件中。

著录项

  • 公开/公告号EP1743370A4

    专利类型

  • 公开/公告日2007-12-05

    原文格式PDF

  • 申请/专利权人 VERTICAL CIRCUITS INC.;

    申请/专利号EP20050736129

  • 发明设计人 VINDASIUS AL;ROBINSON MARC;

    申请日2005-04-12

  • 分类号H01L23/29;H01L23/053;H01L23/31;

  • 国家 EP

  • 入库时间 2022-08-21 20:00:41

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