FULLY DIFFERENTIAL COMPARATOR AND FULLY DIFFERENTIAL AMPLIFIER

摘要

A first to a fourth sampling switch (1a to 1d), a first to a fourth sampling capacitor (4 to 7), and a first and a second charge redistribution switch (2a, 2b) are provided on the input side of a differential amplifier (8). A first and a second reset switch (3a, 3b) are provided between the input and the output of the differential amplifier (8). An input signal voltage (Vinp) having a positive polarity, a comparison reference voltage (Vrefn) having a negative polarity, a comparison reference voltage (Vrefp) having a positive polarity, and an input signal voltage (Vinn) having a negative polarity are respectively applied through a first to a fourth sampling switch (1a to 1d) to one end of each of the first to the fourth sampling capacitor (4 to 7). During a reset period, the reset of the differential amplifier (8) is released after sampling of each voltage is completed, and during a comparison period, the first and the second charge redistribution switch (2a, 2b) are electrically connected.