Correlated Double Sampling and Analogue to Digital Converting Apparatus using multiple sampling in CMOS image Sensor

摘要

The CDS and ADC apparatus and method using the multiple sampling is started. CDS and ADC apparatus is one period of the horizontal scan time, the reset input and a video signal for each N times the sampling, and the sampled signal and the ramp signal comparison and the comparison result to the corresponding to the comparison signal to output the CDS block, the reference clock signal a receive and respond to the phase shifter, the active the enable signal for generating a clock signal and an enable signal having a phase difference as much as the integer multiple of the sampling at the end of the reference phase of the clock signal and (360 / N) received per receiving a first code generator for counting the edges, and the digital code and the comparison signal of the clock signal output from the phase shifters and the value of the digital code output from the code generator at the time that the comparison signal transition and a data bus latch. ; CIS (CMOS Image Sensor) and CDS (Correlated double Sampling)