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METHOD OF PAYMENT OF INTERNAL DELAYS WITHIN each node and transmission delays between nodes
METHOD OF PAYMENT OF INTERNAL DELAYS WITHIN each node and transmission delays between nodes
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机译:每个节点内部延迟的支付方法以及节点之间的传输延迟
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1.method u0434u043bu00a0 synchronization of real time the first node and the second node hours of real time, real time clock u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u0430 containing phases. which u043eu0442u043fu0440u0430u0432u043bu00a0u044eu0442 real time clock u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u0430 and number one on the first node, the first node set real time clock.equal hours of real time u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u0430; forming the second number; u043eu0442u043fu0440u0430u0432u043bu00a0u044eu0442 real time clock u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u0430 and the second number to the second node and imposed real time clock to the second node, u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u0430 equal hours of real time.;2. method for 1, further containing phase to establish the network address of the first node u0434u043bu00a0, equal to the first number.;3. a way to 2, in which the network address of the first node u0434u043bu00a0, equal to the first number, u0432u044bu043fu043eu043bu043du00a0u0435u0442u0441u00a0 first node.;4. method for 1, in which the hours of real time u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u0430 rooms on the first node and the first u0432u044bu043fu043eu043bu043du00a0u0435u0442u0441u00a0 u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u043eu043c.;5. method for 1, in which the hours of real time clock real time equal to the first node, the first node in the u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u0430, u0432u044bu043fu043eu043bu043du00a0u0435u0442u0441u00a0.;6. method for 1, in which the formation of the second non u0432u044bu043fu043eu043bu043du00a0u0435u0442u0441u00a0 first node.;7. method for 1, in which the hours of real time u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u0430 and number two at the second node of the first node in the u0432u044bu043fu043eu043bu043du00a0u0435u0442u0441u00a0.;8. method for 1, in which the hours of real time clock real time equal to the second node, the second node u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u0430, u0432u044bu043fu043eu043bu043du00a0u0435u0442u0441u00a0.;9. method for 1, in which the hours of real time u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u0430 and first non contains stages in which form the u0441u0438u043du0445u0440u043eu0441u043bu043eu0432u043e containing real clock wow time u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u0430 and first number; and u043eu0442u043fu0440u0430u0432u043bu00a0u044eu0442 u0441u0438u043du0445u0440u043eu0441u043bu043eu0432u043e at the first node.;10. method for p.9, in which the hours of real time u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u0430 and number two at the second node contains stages in which modify the u0441u0438u043du0445u0440u043eu0441u043bu043eu0432u043e u043fu043eu0441u0440u0435 u0434u0441u0442u0432u043eu043c u0437u0430u043cu0435u0449u0435u043du0438u00a0 first non number two; and u043eu0442u043fu0440u0430u0432u043bu00a0u044eu0442 modified u0441u0438u043du0445u0440u043eu0441u043bu043eu0432u043e at the second node.;11. method for 1, in which the first node, the second node and the multiplexer are connected to each other in u0448u043bu0435u0439u0444u043eu0432u043eu0439 configuration.;12. method for u043fu0435u0440u0435u0434u0430u044eu0442u0441u00a0 1, in which the data between the first node and the second node and u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u043eu043c using u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u0438u0440u043eu0432u0430u043du0438u00a0 with temporal separation (tdm).;13. method for 1, further containing phase to establish the network address of the second node u0434u043bu00a0, equal to the second number.;14. method for 1, in which the second plate includes a step in which the first u043eu0441u0443u0449u0435u0441u0442u0432u043bu00a0u044eu0442 increment numbers on the unit.;15.method u0434u043bu00a0 compensation of one or more delay transfer between u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u043eu043c, the first node and the second node containing the stages in which counting delay p u0435u0440u0435u0434u0430u0447u0438 between u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u043eu043c and the first node using the u0443u0440u0430u0432u043du0435u043du0438u00a0 (RTCu043a + Delayu043a) mod (MTslot) = (k - 1) Tslot, where m denotes the number of time intervals within the strips s u043fu0440u043eu043fu0443u0441u043au0430u043du0438u00a0 environmentu0441u043au043eu043du0444u0438u0433u0443u0440u0438u0440u043eu0432u0430u043du043du043eu0439 u0434u043bu00a0 transfer of data between the first node and the second node u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u043eu043c, denotes the length of each time interval, Tslot, k denotes the address of the host u0432u0437u00a0u0442u0438u00a0 mod denotes the operation module, RTCu043a stands for real time clock k th node, and Delayu043a denotes the accumulated delay transmission of u043cu0443u043bu044cu0442u0438u043fu043bu0435u043a look at the k th node; u043eu0442u043fu0440u0430u0432u043bu00a0u044eu0442 real time clock u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u0430,the first number and the delay of the first node; and establishing a real time clock first node equal hours of real time u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u0430, plus u0437u0430u0434u0435u0440u0436 this transfer.;16. method for p.15, additionally containing a phase in which the u043eu0442u043fu0440u0430u0432u043bu00a0u044eu0442 data multiplexer used in u0432u0440u0435u043cu00a0, a delay of transmission.;17. method for p.15, additionally containing a phase in which the expected delay between the first node and the second node transmission using u0443u0440u0430u0432u043du0435u043du0438u00a0.;18. way to p.17, further containing stages in which u043eu0441u0443u0449u0435u0441u0442u0432u043bu00a0u044eu0442 increment of numbers on the unit to form a second number; and u043eu0442u043fu0440u0430u0432u043bu00a0u044eu0442 on u0432u0442u043eu0440 oh, the real time clock u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u0430, number 2, the delay of transfer between u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u043eu043c and the first node, and the delay between the first node and u0432u0442u043eu0440 transfer ies knot.;19. way on p.18, additionally containing a phase in which the set real time clock real time clock for the second node, the same u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u0430, plus three u0430u0434u0435u0440u0436u043au0430 transfer between u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u043eu043c and the first node, plus the delay transmission between the first node and the second node.;20. way on p.19, additionally containing a phase in which the u043eu0442u043fu0440u0430u0432u043bu00a0u044eu0442 data multiplexer used in u0432u0440u0435u043cu00a0, a delay of transfer between u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u043e m and the first node, plus the delay between the first node and the second node transmission.;21. method for p.15, which contains the transmission delay caused by the internal processing of data within the first node.;22. method for calculating delay, p.15, in which transmission between u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u043eu043c and the first node includes a stage in which the difference between the time data and u043fu0440u0438u0431u044bu0442u0438u00a0 u0438u0437u043cu0435u0440u00a0u044eu0442 the first node in the multiplexer and the time u043fu0440u0438u0431u044bu0442u0438u00a0, calculated using the u0443u0440u0430u0432u043du0435u043du0438u00a0.;23. method for calculating delay, p.22, in which transmission between the first node u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u043eu043c and further contains a phase in which the expected delay of transfer between do u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u043eu043c and the first node using the measured difference.;24. method for p.15, further containing phase to establish the network address of the first node u0434u043bu00a0, equal to the first number.;25. method for calculating delay, p.17, in which transmission between the first node and the second node includes a stage in which the difference between the time u0438u0437u043cu0435u0440u00a0u044eu0442 u043fu0440u0438u0431u044bu0442u0438u00a0 data from bw u043eu0440u043eu0433u043e node at the first node and the time u043fu0440u0438u0431u044bu0442u0438u00a0, calculated using the u0443u0440u0430u0432u043du0435u043du0438u00a0.;26. way on p.25, in which the calculation delay transfer between the first node and the second node further includes a stage in which the expected delay transfer between p u0435u0440u0432u044bu043c node and the second node using the measured difference.;27.method u0434u043bu00a0 compensation of one or more delay transfer between u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u043eu043c, the first node and the second node containing phases.to synchronize the first real time clock u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u0430 as hours of real time of first node, and as the hours of real time u0432u0442u043eu0440 wow node; taking data from a first node; counting the delay between the first node and the transmission u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u043eu043c using u0443u0440u0430u0432u043du0435u043du0438u00a0 (RTCu043a + Delayu043a) mod (MTslot) = (k - 1) Tslot,where m denotes the number of time intervals within the u043fu0440u043eu043fu0443u0441u043au0430u043du0438u00a0 environment, u0441u043au043eu043du0444u0438u0433u0443u0440u0438u0440u043eu0432u0430u043du043du043eu0439 u0434u043bu00a0 transfer of data between the first node u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u043eu043c, and the second node, Tslot denotes the length of each time interval, k denotes the address of the host u0432u0437u00a0u0442u0438u00a0 mod denotes the operation module, RTCu043a refers to watch real madrid u044cu043du043eu0433u043e time k th nodeand Delayu043a denotes the accumulated delay transmission of u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u0430 at the k th node; u043eu0442u043fu0440u0430u0432u043bu00a0u044eu0442 second real time clock u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u0430, the first number and the delay tap u0440u0435u0434u0430u0447u0438 at the first node; and establishing a real time clock first node equal to the second clock real time u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u0430, plus the delay of transmission.;28. way on p.27, additionally containing a phase in which the u043eu0442u043fu0440u0430u0432u043bu00a0u044eu0442 data multiplexer used in u0432u0440u0435u043cu00a0, a delay of transmission.;29. method for p.27, which synchronize the first real time clock real time clock u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u0430 as the first node and the second node of the real time clock. u0436u0430u0449u0438u0439 stageswhich u043eu0442u043fu0440u0430u0432u043bu00a0u044eu0442 first real time clock u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u0430 and number one on the first node, the first node in the set real time clock as the first hours of real time u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u0430; forming the second number; u043eu0442u043fu0440u0430u0432u043bu00a0u044eu0442 first real time clock u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u0430 and number two at the second node; and imposed real time clock to the second node.as the first, real time u043cu0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440u0430.
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