High speed modular bus architecture for computer system - has motherboard datanet passing data signals between master and module devices over terminated module data net of removable module

摘要

The bus includes a terminated motherboard data net which passes signals between a master and one or more motherboard devices. A socket passes data signals between the motherboard data net and a terminated module data net of a removable module. The module data net passes data signals between the master and one or more modules. A data signal swing and a level of reflection of the data signals are independent of the presence of the module. A terminated motherboard clock net sends a clock signal to the motherboard devices. A splitter divides the clock signal into two.