首页> 外国专利> Reducing contamination of silicon substrate during metallizing process for the production of metallization layers of semiconductor device by selectively forming a support layer and structuring dielectric layer pile by an anisotropic etching

Reducing contamination of silicon substrate during metallizing process for the production of metallization layers of semiconductor device by selectively forming a support layer and structuring dielectric layer pile by an anisotropic etching

机译:通过选择性地形成支撑层并通过各向异性刻蚀来构造介电层堆,从而在用于制造半导体器件的金属化层的金属化过程中减少硅衬底的污染

摘要

The reduction of contamination of silicon substrate (100) during metallizing process for the production of metallization layers of semiconductor device such as application specific integrated circuit and static random access memory, comprises selectively forming a support layer over beveling edge (105) of the substrate, forming a dielectric layer pile for a metallization layer of a semiconductor element over the substrate, and structuring the dielectric layer pile by an anisotropic etching process by selectively changing adhering characteristics of the support layer. The reduction of contamination of silicon substrate (100) during metallizing process for the production of metallization layers of semiconductor device such as application specific integrated circuit and static random access memory, comprises selectively forming a support layer over beveling edge (105) of the substrate, forming a dielectric layer pile for a metallization layer of a semiconductor element over the substrate, and structuring the dielectric layer pile by an anisotropic etching process by selectively changing adhering characteristics of the support layer in an area of the beveling edge with increased surface area in regard to a polymer sort that is used in the structuring of the dielectric layer pile. The substrate has a central zone (104) adjoining to the beveling edge to receive a circuit element of an integrated circuit. The support layer has a surface having different adhesive characteristics related to corrosive dependent polymer materials in comparison to the upper surface of the beveling edge. The selective formation of the support layer comprises selectively supplying a material of the support layer on the substrate in a condition of slight viscosity, hardening the material to form the support layer, separating the support layer over the central zone and the beveling edge, removing the support layer from the central zone, forming a mask layer over the support layer, etching the mask layer to expose the support layer in the central zone while a part of the mask layer is retained in the beveling edge, removing an exposed area of the support layer and the area of the mask layer in a joint etching process in such a way that the area of the support layer is conserved in the beveling edge, and forming a surface topography in the surface of the beveling edge by the formation of the support layer to enlarge a boundary area between the support layer and the surface of the beveling edge. The formation of surface topography comprises forming grooves in the beveling edge. The adhering characteristics of the support layer are changed by forming the support layer with a reduced affinity for fluorine containing polymer material.
机译:在用于生产诸如专用集成电路和静态随机存取存储器之类的半导体器件的金属化层的金属化工艺期间,减少硅衬底(100)的污染包括:在衬底的斜切边缘(105)上选择性地形成支撑层,在基板上形成用于半导体元件的金属化层的介电层堆,并通过选择性地改变支撑层的粘附特性,通过各向异性蚀刻工艺来构造介电层堆。在用于生产诸如专用集成电路和静态随机存取存储器之类的半导体器件的金属化层的金属化工艺期间,减少硅衬底(100)的污染包括:在衬底的斜切边缘(105)上选择性地形成支撑层,在衬底上形成用于半导体元件的金属化层的介电层堆,并通过各向异性地蚀刻斜面边缘区域中的支撑层的粘附特性,从而通过表面积的增加来通过各向异性蚀刻工艺来构造介电层堆。制成用于介电层堆结构化的聚合物。基板具有邻接于斜切边缘的中心区域(104),以接收集成电路的电路元件。与斜切边缘的上表面相比,支撑层的表面具有与腐蚀相关的聚合物材料有关的不同粘合特性。支撑层的选择性形成包括:在略微粘性的条件下在衬底上选择性地提供支撑层的材料;使该材料硬化以形成支撑层;在中心区域和斜切边缘上分离支撑层;去除支撑层。从中心区域形成支撑层,在支撑层上形成掩模层,蚀刻掩模层以暴露中心区域中的支撑层,同时将一部分掩模层保留在斜切边缘中,从而去除支撑物的暴露区域在联合蚀刻工艺中,以这样的方式形成层和掩模层的面积,使得支撑层的面积保留在斜切边缘中,并且通过形成支撑层在斜切边缘的表面中形成表面形貌扩大支撑层和斜切边缘表面之间的边界区域。表面形貌的形成包括在斜切边缘中形成凹槽。通过形成对含氟聚合物材料的亲和力降低的支撑层,可以改变支撑层的粘附特性。

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