首页> 外国专利> Linear system model for use in analog computer technology, has integrator, where entrance of integrator is connected to entrance of device, switch, block of resistive-capacitive chains and multiple-subtractor

Linear system model for use in analog computer technology, has integrator, where entrance of integrator is connected to entrance of device, switch, block of resistive-capacitive chains and multiple-subtractor

机译:用于模拟计算机技术的线性系统模型,具有积分器,积分器的入口连接到设备,开关,电阻电容链块和多减法器的入口

摘要

The model has an integrator (1), where entrance of the integrator is connected to a device entrance (5), a switch (2), a block (3) of the resistive-capacitive (RC) chains and a multiple-subtractor (4). The entrance of the switch is connected to exit of the integrator and another entrance of the switch is connected to another device entrance (6). The output contact of the switch is connected to entrance of the block of RC chains, which are parallely connected. The exit of the multiple subtractor is connected to device exit (7).
机译:该模型具有一个积分器(1),其中积分器的入口连接到设备入口(5),一个开关(2),一个电阻电容(RC)链的块(3)和一个多减法器( 4)。开关的入口连接到积分器的出口,开关的另一个入口连接到另一个设备的入口(6)。开关的输出触点连接到并联连接的RC链块的入口。倍数减法器的出口连接到设备出口(7)。

著录项

  • 公开/公告号DE102006032183A1

    专利类型

  • 公开/公告日2008-01-24

    原文格式PDF

  • 申请/专利权人 LERNER ZINOVIY;

    申请/专利号DE20061032183

  • 发明设计人 LERNER ZINOVIY;

    申请日2006-07-12

  • 分类号G06G7/48;G06G7/625;G06G7/28;

  • 国家 DE

  • 入库时间 2022-08-21 19:49:51

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