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System for limited cache access during data transfer and method

机译:在数据传输期间用于有限的高速缓存访​​问的系统和方法

摘要

Instructions involving a relatively significant data transfer or a particular type of data transfer via a cache result in the application of a restricted access policy to control access to one or more partitions of the cache so as to reduce or prevent the overwriting of data that is expected to be subsequently used by the cache or by a processor. A processor or other system component may assert a signal which is utilized to select between one or more access policies and the selected access policy then may be applied to control access to one or more ways of the cache during the data transfer operation associated with the instruction. The access policy typically represents an access restriction to particular cache partitions, such as a restriction to one or more particular cache ways or one or more particular cache lines.
机译:涉及通过缓存进行相对重要的数据传输或特定类型的数据传输的指令导致应用受限访问策略来控制对缓存的一个或多个分区的访问,从而减少或防止预期的数据覆盖由缓存或处理器随后使用。处理器或其他系统组件可以声明一个信号,该信号用于在一个或多个访问策略和所选访问策略之间进行选择,然后可以在与指令关联的数据传输操作期间将其应用于控制对高速缓存的一种或多种方式的访问。访问策略通常表示对特定缓存分区的访问限制,例如对一种或多种特定缓存方式或一种或多种特定缓存行的限制。

著录项

  • 公开/公告号DE112006000339T5

    专利类型

  • 公开/公告日2007-12-20

    原文格式PDF

  • 申请/专利权人 ADVANCED MICRO DEVICES INC.;

    申请/专利号DE20061100339T

  • 发明设计人

    申请日2006-01-17

  • 分类号G06F12/08;

  • 国家 DE

  • 入库时间 2022-08-21 19:49:30

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