Virtual architecture and virtual instruction set for the calculation of parallel instruction sequences

摘要

A virtual architecture and a virtual command set of assist the explicit calculation of parallel instruction sequences. The virtual architecture defines a virtual processor, the simultaneous execution of a plurality of virtual instruction sequences with several degrees common data usage and coordination (for example, synchronization) between different virtual instruction sequences, as well as a virtual execution of drivers, of the virtual processor controls. A virtual instruction set architecture for the virtual processor is used, the behavior of a virtual instruction sequence in order to define and contains commands, which is located on the behavior of the parallel instruction sequence, for example, common data usage and synchronization. With the use of the virtual platform can programmer application programs in which virtual instruction sequences are carried out simultaneously, in order to process data.Virtual booster and the driver to specific hardware fit the application code, on which it is supposed to be carried out, for the programmer in a transparent manner to.