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PARITY BIT INSERTION METHOD AND PARITY CHECK METHOD, CENTER TERMINAL AND SUBSCRIBER DEVICE

机译:奇偶校验位插入方法和奇偶校验方法,中心终端和用户设备

摘要

PROBLEM TO BE SOLVED: To perform BIP operation easily while keeping matching with an existing system when data of different bit rates are transmitted mixedly.;SOLUTION: The header information of a basic bit rate is added, to data signals of a basic bit rate and other bit rate (42a, 42b) to constitute a data string by time division multiplexing even for the data signal to which the header information is added (43). Furthermore, frame signals are constituted by adding frame headers (44a, 44b), a parity of the frame signals constituted continuously is calculated (45) and based on operation results of the parity, parity bits for the parity check of the data signals of the basic bit rate and the other bit rate are inserted into the frame signals (46, 47).;COPYRIGHT: (C)2009,JPO&INPIT
机译:解决的问题:当混合传输不同比特率的数据时,要在保持与现有系统匹配的同时轻松地执行BIP操作;解决方案:将基本比特率的标头信息添加到基本比特率和另一比特率(42a,42b)通过时分复用来构成数据串,甚至对于添加了头信息的数据信号(43)。此外,通过添加帧头(44a,44b)来构成帧信号,计算连续构成的帧信号的奇偶校验(45),并且基于奇偶校验的运算结果,用于对奇偶校验位的数据信号进行奇偶校验的奇偶校验位。基本位速率和其他位速率插入帧信号(46,47).;版权:(C)2009,JPO&INPIT

著录项

  • 公开/公告号JP2009016925A

    专利类型

  • 公开/公告日2009-01-22

    原文格式PDF

  • 申请/专利权人 FUJITSU LTD;

    申请/专利号JP20070173189

  • 发明设计人 SAKAI YOSHIO;MORI KAZUYUKI;

    申请日2007-06-29

  • 分类号H04J3/00;H04L12/44;H04L1/00;H04J3/22;

  • 国家 JP

  • 入库时间 2022-08-21 19:42:04

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