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Taking in the response output signal of IC test equipment null suffering test IC which uses the response output signal

机译:接收使用该响应输出信号的IC测试设备的响应输出信号零损耗测试IC

摘要

PROBLEM TO BE SOLVED: To speed up an IC testing device. ;SOLUTION: In this IC testing device for judging the quality of an IC to be tested by comparing the compared result with an expected value by reading the compared result in a logic comparator in the impressing timing of a strobe pulse by comparing and judging whether or not to have voltage corresponding to normal H logic and L logic in a comparator by inputting a response output signal outputted by the IC to be tested to the comparator via a signal transmission line, an expected value signal is superimposed on the response output signal in the timing when the response output signal arrives at the comparator, and the rise of the response output signal is steepened to quicken the detecting timing of the comparator.;COPYRIGHT: (C)2001,JPO
机译:要解决的问题:加快​​IC测试设备的速度。 ;解决方案:在该IC测试设备中,通过在比较器判断脉冲选通脉冲的施加时序中在逻辑比较器中读取比较结果与期望值之间的比较结果与预期值之间的比较来判断待测试IC的质量通过经由信号传输线将由待测试的IC输出的响应输出信号输入到比较器而在比较器中不具有对应于正常H逻辑和L逻辑的电压,期望值信号被叠加在比较器中的响应输出信号上。响应输出信号到达比较器的时间,并且响应输出信号的上升变陡,以加快比较器的检测时间。;版权:(C)2001,JPO

著录项

  • 公开/公告号JP4291493B2

    专利类型

  • 公开/公告日2009-07-08

    原文格式PDF

  • 申请/专利权人 株式会社アドバンテスト;

    申请/专利号JP20000100884

  • 发明设计人 酒井 秀男;

    申请日2000-04-03

  • 分类号G01R31/28;

  • 国家 JP

  • 入库时间 2022-08-21 19:38:24

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