METHOD OF PROGRESSIVELY PROTOTYPING AND VALIDATING A CUSTOMER'S ELECTRONIC SYSTEM DESIGN

摘要

A method for prototyping and validating a customer's electronic system design (ESD) with design data is proposed. The design data is partitioned into hierarchical design elements (HDEs) plus their respective test benches. The ESD couples with customer's customer peripheral devices CPDs via their peripheral interface terminals PITs thus forming interconnected hierarchical system elements (HSEs) interacting with one another according to a functional validation specification. The HSEs form numerous system hierarchy levels (SHLs). The method includes:a) Providing a reprogrammable logic device (RPLD) with an RPLD-interface and programmable external interfaces PXIFs respectively connected to the PITs.b) Providing a simulation software tool.c) Disabling all PXIFs via RPLD-interface. (For each disabled PXIF, identifying HDEs connected to the PXIF and appending their test benches with stimuli and responses to form appended test benches.d) Progressively verifying and validating all HSEs against the functional validation specification following an upward movement along the SHLs.