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High slew rate amplifier, analog-to-digital converter using same, CMOS imager using the analog-to-digital converter and related methods

机译:高转换速率放大器,使用该放大器的模数转换器,使用模数转换器的CMOS成像器及相关方法

摘要

An amplifier, which may be used in a pipelined analog-to-digital converter, includes a first amplifier stage driving a second amplifier stage. At least one compensation capacitor is coupled to provide negative feedback through the capacitor from the second amplifier stage to the first amplifier stage. The slew rate of the amplifier is enhanced by substantially reducing the negative feedback coupled through the capacitor during a period following the transition of a signal applied to an input terminal of the amplifier. If the first stage of the amplifier has complementary signal nodes, the negative feedback coupled through the capacitor may be reduced, for example, by closing a switch coupled between first and second complementary nodes of the first amplifier stage.
机译:可以在流水线模数转换器中使用的放大器包括驱动第二放大器级的第一放大器级。至少一个补偿电容器被耦合以通过电容器从第二放大器级到第一放大器级提供负反馈。通过在施加到放大器的输入端的信号转变之后的时间段内,通过基本上减少通过电容器耦合的负反馈,来增强放大器的转换速率。如果放大器的第一级具有互补信号节点,则可以例如通过闭合在第一放大器级的第一和第二互补节点之间耦合的开关来减小通过电容器耦合的负反馈。

著录项

  • 公开/公告号US7564397B2

    专利类型

  • 公开/公告日2009-07-21

    原文格式PDF

  • 申请/专利权人 TAEHEE CHO;

    申请/专利号US20070786338

  • 发明设计人 TAEHEE CHO;

    申请日2007-04-10

  • 分类号H03M1/38;

  • 国家 US

  • 入库时间 2022-08-21 19:31:23

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