首页> 外国专利> SRAM CELLS WITH REPRESSED FLOATING GATE MEMORY, LOW TUNNEL BARRIER INTERPOLY INSULATORS

SRAM CELLS WITH REPRESSED FLOATING GATE MEMORY, LOW TUNNEL BARRIER INTERPOLY INSULATORS

机译:SRAM电池,带有浮动栅闸极存储器,低隧道栅绝缘层绝缘子

摘要

Structures and methods are provided for SRAM cells having a novel, non-volatile floating gate transistor, e.g. a non-volatile memory component, within the cell which can be programmed to provide the SRAM cell with a definitive asymmetry so that the cell always starts in a particular state. The SRAM cells include a pair of cross coupled transistors. At least one of the cross coupled transistors includes a first source/drain region and a second source/drain region separated by a channel region in a substrate. A floating gate opposes the channel region and separated therefrom by a gate oxide. A control gate opposes the floating gate. The control gate is separated from the floating gate by a low tunnel barrier intergate insulator.
机译:提供了具有新颖的,非易失性浮栅晶体管的SRAM单元的结构和方法。非易失性存储器组件,位于单元内,可以进行编程以向SRAM单元提供确定的不对称性,以便该单元始终以特定状态启动。 SRAM单元包括一对交叉耦合的晶体管。交叉耦合晶体管中的至少一个包括被衬底中的沟道区分开的第一源/漏区和第二源/漏区。浮栅与沟道区相对并由栅氧化物与沟道区分开。控制栅极与浮置栅极相对。控制栅通过低隧道势垒栅间绝缘体与浮栅隔开。

著录项

  • 公开/公告号US2009008697A1

    专利类型

  • 公开/公告日2009-01-08

    原文格式PDF

  • 申请/专利权人 LEONARD FORBES;

    申请/专利号US20080207141

  • 发明设计人 LEONARD FORBES;

    申请日2008-09-09

  • 分类号H01L29/788;

  • 国家 US

  • 入库时间 2022-08-21 19:30:22

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