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Stalling processor pipeline for synchronization with coprocessor reconfigured to accommodate higher frequency operation resulting in additional number of pipeline stages
Stalling processor pipeline for synchronization with coprocessor reconfigured to accommodate higher frequency operation resulting in additional number of pipeline stages
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机译:停顿的处理器流水线与协处理器同步,重新配置以适应更高频率的运行,从而导致流水线级数增加
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摘要
A processor system that includes a main processor, and a coprocessor connected to the main processor. If the number of instruction execution cycles of an extended instruction executed by the coprocessor is larger than the number of instruction execution cycles of a basic instruction executed by the main processor, a pipeline process for a subsequent instruction retrieved after the extended instruction is stopped at least for a period corresponding to a difference between the number of instruction execution cycles of the extended instruction and the number of instruction execution cycles of the basic instruction.
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