首页> 外国专利> Sequence detector using viterbi algorithm with soft output error correction

Sequence detector using viterbi algorithm with soft output error correction

机译:使用维特比算法的序列检测器,具有软输出纠错功能

摘要

A sequence detector (1400-w) operating generally according to the Viterbi algorithm contains a branch metric generator (1402-w), comparison circuitry (1403-w), and symbol generation circuitry (1404, 1405, and 1406) for converting digital values of a detector input signal into a sequence of predefined symbols chosen from an alphabet of predefined symbols. The comparison circuitry provides soft output signals for correcting errors. The soft output signals include best and second-best state metrics (pk,w(i) and p2k,w(i)) and corresponding best and second-best comparison results (Dk,w(i) and D2k,w(i)). The symbol generation circuitry typically utilizes the best comparison results to generate a preliminary sequence of the predefined symbols, checks for error in the preliminary sequence, and utilizes the second-best comparison results in correcting any such error in the preliminary sequence so as to convert it into a final sequence of the predefined symbols.
机译:通常根据维特比算法运行的序列检测器( 1400 - w )包含分支度量生成器( 1402 - w ),比较电路( 1403 - w )和符号生成电路( 1404、1405 1406 ),用于将检测器输入信号的数字值转换为从预定义符号的字母表中选择的预定义符号序列。比较电路提供软输出信号以纠正错误。软输出信号包括最佳和次佳状态度量(p k,w (i)和p 2 k,w (i) )以及相应的最佳和次佳比较结果(D k,w (i)和D 2 k,w (i))。符号生成电路通常利用最好的比较结果来生成预定义符号的初步序列,检查初步序列中的错误,并利用次佳的比较结果来纠正初步序列中的任何此类错误以对其进行转换。进入预定义符号的最终序列。

著录项

  • 公开/公告号US7526053B1

    专利类型

  • 公开/公告日2009-04-28

    原文格式PDF

  • 申请/专利权人 PETER J. SALLAWAY;SREEN RAGHAVAN;

    申请/专利号US20060517435

  • 发明设计人 SREEN RAGHAVAN;PETER J. SALLAWAY;

    申请日2006-09-08

  • 分类号H04B1/10;H03D1/00;

  • 国家 US

  • 入库时间 2022-08-21 19:29:30

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