Processing unit having decimal floating-point divider using Newton-Raphson iteration

摘要

A decimal floating-point divider is described that implements efficient hardware-based techniques for performing decimal floating-point division. The divider uses an accurate piecewise linear approximation to obtain an initial estimate of a divisor's reciprocal. The divider improves the initial estimate of the divisor's reciprocal using a modified form of Newton-Raphson iteration. The divider multiplies the estimated divisor's reciprocal by the dividend to produce a preliminary quotient. The preliminary quotient is rounded to produce the final decimal floating-point quotient.