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Systems and methods for loading data into the cache of one processor to improve performance of another processor in a multiprocessor system

机译:用于将数据加载到一个处理器的高速缓存中以改善多处理器系统中另一处理器的性能的系统和方法

摘要

Systems and methods for improving the performance of a multiprocessor system by enabling a first processor to initiate the retrieval of data and the storage of the data in the cache memory of a second processor. One embodiment comprises a system having a plurality of processors coupled to a bus, where each processor has a corresponding cache memory. The processors are configured so that a first one of the processors can issue a preload command directing a target processor to load data into the target processor's cache memory. The preload command may be issued in response to a preload instruction in program code, or in response to an event. The first processor may include an explicit identifier of the target processor in the preload command, or the selection of the target processor may be left to another agent, such as an arbitrator coupled to the bus.
机译:通过使第一处理器能够启动数据的检索以及将数据存储在第二处理器的高速缓存中来提高多处理器系统的性能的系统和方法。一个实施例包括一种具有耦合到总线的多个处理器的系统,其中每个处理器具有对应的高速缓冲存储器。处理器被配置为使得处理器中的第一个可以发出预加载命令,该预加载命令引导目标处理器将数据加载到目标处理器的高速缓存存储器中。可以响应于程序代码中的预加载指令或响应事件来发出预加载命令。第一处理器可以在预加载命令中包括目标处理器的显式标识符,或者可以将目标处理器的选择留给另一个代理,例如耦合到总线的仲裁器。

著录项

  • 公开/公告号US7484041B2

    专利类型

  • 公开/公告日2009-01-27

    原文格式PDF

  • 申请/专利权人 TAKASHI YOSHIKAWA;

    申请/专利号US20050098109

  • 发明设计人 TAKASHI YOSHIKAWA;

    申请日2005-04-04

  • 分类号G06F9/38;

  • 国家 US

  • 入库时间 2022-08-21 19:29:11

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