A processing device for designing the area between printed circuit boards stores the printed circuit board data of a plurality of printed circuit boards, substrate data, and an inter-substrate connection condition file indicating the connection relationships between the printed circuit boards in advance. The processing device for designing the area between printed circuit boards reads the substrate data and the inter-substrate connection condition file, traces the connection path of a signal across the printed circuit boards, and extracts the trace information. The processing device for designing the area between printed circuit boards calculates the delay time and attenuation of the signal from the extracted trace information and stores the trace information and the delay time and attenuation of the signal in association with one another.
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