首页> 外国专利> ISOLATION STRUCTURE IN A MEMORY DEVICE AND A FABRICATING METHOD FOR THE SAME, CAPABLE OF SUPPRESSING THE DETERIORATION OF HOT ELECTRON INDUCED PUNCHTHROUGH OF A TRANSISTOR

ISOLATION STRUCTURE IN A MEMORY DEVICE AND A FABRICATING METHOD FOR THE SAME, CAPABLE OF SUPPRESSING THE DETERIORATION OF HOT ELECTRON INDUCED PUNCHTHROUGH OF A TRANSISTOR

机译:存储器中的隔离结构及其制造方法,能够抑制热电子诱发的晶体管的冲淡

摘要

PURPOSE: An isolation structure in a memory device and a fabricating method for the same are provided to suppress silicon dislocation and slip at a cell region effectively.;CONSTITUTION: An isolation structure in a memory device and a fabricating method for the same is comprised of the steps: forming a first trench(111) at a cell region and a second trench(112) at peripheral region; forming a liner layer(300) including a silicon nitride layer(330) on the first and the second trench surface; forming the first element isolation layer(410) on a liner and the first element isolation layer including floating insulating layer filing a first and a second trench and removing the first element isolation layer filling the second trench selectively.;COPYRIGHT KIPO 2010
机译:目的:提供一种存储器件中的隔离结构及其制造方法,以有效地抑制硅在单元区的位错和滑移。组成:存储器件中的隔离结构及其制造方法包括:步骤:在单元区形成第一沟槽(111),在外围区形成第二沟槽(112)。在第一和第二沟槽表面上形成包括氮化硅层(330)的衬里层(300);在衬垫上形成第一元件隔离层(410),并且第一元件隔离层包括浮置绝缘层,该浮置绝缘层形成第一沟槽和第二沟槽,并选择性地去除填充第二沟槽的第一元件隔离层。COPYRIGHTKIPO 2010

著录项

  • 公开/公告号KR20090107742A

    专利类型

  • 公开/公告日2009-10-14

    原文格式PDF

  • 申请/专利权人 HYNIX SEMICONDUCTOR INC.;

    申请/专利号KR20080033168

  • 发明设计人 EUN BYUNG SOO;

    申请日2008-04-10

  • 分类号H01L21/762;

  • 国家 KR

  • 入库时间 2022-08-21 19:12:26

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