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ISOLATION STRUCTURE IN A MEMORY DEVICE AND A FABRICATING METHOD FOR THE SAME, CAPABLE OF SUPPRESSING THE DETERIORATION OF HOT ELECTRON INDUCED PUNCHTHROUGH OF A TRANSISTOR
ISOLATION STRUCTURE IN A MEMORY DEVICE AND A FABRICATING METHOD FOR THE SAME, CAPABLE OF SUPPRESSING THE DETERIORATION OF HOT ELECTRON INDUCED PUNCHTHROUGH OF A TRANSISTOR
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机译:存储器中的隔离结构及其制造方法,能够抑制热电子诱发的晶体管的冲淡
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摘要
PURPOSE: An isolation structure in a memory device and a fabricating method for the same are provided to suppress silicon dislocation and slip at a cell region effectively.;CONSTITUTION: An isolation structure in a memory device and a fabricating method for the same is comprised of the steps: forming a first trench(111) at a cell region and a second trench(112) at peripheral region; forming a liner layer(300) including a silicon nitride layer(330) on the first and the second trench surface; forming the first element isolation layer(410) on a liner and the first element isolation layer including floating insulating layer filing a first and a second trench and removing the first element isolation layer filling the second trench selectively.;COPYRIGHT KIPO 2010
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